Vidal-Silva, CristianVillarroel, RodolfoRubio, José MiguelJohnson, FranklinMadariaga, ErikaCampos, CamiloCarter, Luis2019-07-152019-07-1520182156-557010.14569/IJACSA.2018.091071https://hdl.handle.net/20.500.12536/105UML sequence diagrams usually represent the behavior of systems execution. Automated verification of UML sequence diagrams’ correctness is necessary because they can model critical algorithmic behaviors of information systems. UML sequence diagrams applications are often on the requirement and design phases of the software development process, and their correctness guarantees the accurate and transparent implementation of software products. The primary goal of this article is to review and improve the translation of basic and complex UML sequence diagrams into Spin / Promela code taking into account behavioral properties and elements of combined fragments of UML sequence diagrams for synchronous and asynchronous messages. This article also redefines a previous proposal for a transition system for UML sequence diagrams by specifying Linear Temporal Logic (LTL) formulas to verify the model correctness. We present an application example of our modeling proposal on a modified version of a traditional case study by using UML sequence diagrams to translate it into Promela code to verify their properties and correctness.enSpin / PromelaUML Sequence DiagramsFault toleranceLTL formulasCombined fragmentArtículo de revista